Job opportunities for DFT Manager

Role:

DFT manager will be the inhouse expert in DFT architecture and implementation.

DFT manager will be responsible for full chip DFT, DFT methodology development, DFT planning & archiecture, test insertion,

ATPG pattern generation and post silicon test support.

Chips are complex mixed-signal and use latest DFT technicques consisting of logic bist, scan, mbist  and test techniques for analog/mixed-signal blocks (adc,dac,pll and serdes). 

Desired Skills & Experience:

8-10 years of relevant experience with industry standard DFT tools (Mentor and/or Synopsys tools)

Must have hands-on experience of SCAN,BIST and JTAG.

Must also demonstrate intimate knowledge of DFT tools used in DFT flow (Mentor/Synopsys tools, Primetime or equivalent)

Proven experience in establishing a full chip DFT flow and taking chips to volume production.

Experience in 40nm and below technologies.

Travel:

Will require to travel for about 2/3 weeks every 6 months.