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Job Opportunities for DFT Engineers

Job Opportunities for DFT Engineers

Responsibilities: - DFT: full scan insertion, ATPG, test compression, transition delay faults (TDF), physical test - bridging faults - preferred - RAM BIST: memory BIST generation, built-in self repair - Boundary Scan: AC JTAG, DC JTAG - Logic BIST - Serdes BIST (preferred) Maintaining a minimum...

Updated: 2012-Feb-29 02:31 PM

Industry: SemiconductorRole: DFT Engineers

Experience Level: 4.0 to 7.0 yrsLocation: (India)

Keywords: JTAG SCAN BIST MBIST

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